The present invention relates to semiconductor devices. More specifically, the present invention relates to a semiconductor device having self-aligned gate contacts over an active area and a method for manufacturing the device.
Field-effect transistors (FETs) are used in many integrated circuit designs, as switches to open and close the circuits. In general, a FET includes a source region and a drain region connected by a channel, and a gate that regulates electron flow through the channel between the source and drain regions.
For years, the continued minimization of metal oxide semiconductor field-effect transistors (MOSFETs) has driven the worldwide semiconductor industry. Access to and operation of semiconductor devices is provided by contacts to the devices. During manufacture or forming of semiconductor devices, it is important to ensure that gate contacts do not short to the source/drain region. To avoid shorting, a gate must be contacted in a field region. This ground rule limits wiring flexibility at the first metal level and increases the footprint of cells which require multiple gate contacts, especially when adjacent gates must be contacted.